27 lines
1.2 KiB
Plaintext
27 lines
1.2 KiB
Plaintext
# SPDX-License-Identifier: AGPL-3.0-or-later
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# Copyright (C) 2026 David (Corey) Herrera
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# matmul_float16b_lofi_fp32acc.cbtable
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# Fourth cell of the 2x2 (fidelity x DST accumulator width) design used to explain the
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# docs/tt_bringup_log.md §16.3 inversion. See matmul_float16b_lofi.cbtable and
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# matmul_float16b_fp32acc.cbtable for the other two off-diagonal cells; the shipped
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# matmul_float16b.cbtable (HiFi4, dst_accum_mode 0) is the fourth.
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#
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# If DST accumulator width is the dominant error term and fidelity is secondary, this
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# cell should land close to matmul_float16b_fp32acc.cbtable's accuracy on the long-K
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# shapes (both 32-bit-accumulator arms converge, regardless of fidelity) rather than
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# close to matmul_float16b_lofi.cbtable's (which would mean fidelity, not accumulator
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# width, still dominates even with the accumulator widened).
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#
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# NEVER pointed to by build_tensix_program.sh in Makefile.ops or any shipped program
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# directory. It exists only for foundry/tt/tests/test_fidelity_sweep.c.
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#
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# Format: tools/emit_tensix_cb_formats.py
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math_fidelity 0
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approx 0
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dst_accum_mode 1
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cb 0 Float16_b 32 32 16 4
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cb 1 Float16_b 32 32 16 4
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cb 16 Float16_b 32 32 16 4
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