56 lines
3.0 KiB
Plaintext
56 lines
3.0 KiB
Plaintext
# SPDX-License-Identifier: AGPL-3.0-or-later
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# Copyright (C) 2026 David (Corey) Herrera
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# eltwise_float16b.cbtable
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# The CB contract for the resident ELEMENTWISE triad: SiLU, sigmoid, add, mul, sub and
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# the SiLU-gated multiply, all in one binary (resident_eltwise_compute.c).
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#
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# cb 0 Float16_b 2048 B input A
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# cb 1 Float16_b 2048 B input B, read only by a binary function
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# cb 2 Float16_b 2048 B scratch: silu(a) staging for the gated multiply
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# cb 16 Float16_b 2048 B output
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#
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# The reader and writer must be built with tile_bytes=2048 to match. There is no
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# descriptor header on a data-movement core, so nothing checks that for you.
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#
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# ---------------------------------------------------------------------------
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# dst_accum_mode 1 -- fp32 destination accumulation, ON, and it is a DEFAULT now
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# ---------------------------------------------------------------------------
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# docs/tt_bringup_log.md 19: DST_ACCUM_MODE=1 bought 13-35x accuracy on the matmul for
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# ZERO wall clock (ffn_down max-abs 2.187 -> 0.0626, PCC 0.998878 -> 0.999999, 473.3 ->
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# 473.4 GFLOP/s), because these ops are data-movement bound and the accumulator is free
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# for exactly the reason MATH_FIDELITY is. Every op written from here on turns it on
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# unless it has a measured reason not to, and this one does not.
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#
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# The cost it can have is DST CAPACITY: a Float32 destination fits half as many tiles per
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# DstSync half. This kernel holds exactly ONE tile in DST at a time -- dst_register is
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# always 0 and every function commits before the next tile is acquired -- so the halving
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# cannot bind. An op that batches several tiles into DST (upstream's `ndst` pattern) has to
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# check this again; it is a real constraint that simply does not reach here.
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#
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# For an elementwise op the accumulator matters less than it does for a long-K matmul --
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# there is no K loop re-quantising a running sum -- but it is not nothing: the SFPU reads
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# and writes DST, so silu and sigmoid keep fp32 through the activation instead of rounding
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# to bf16 between the copy, the SFPU pass and the pack.
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#
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# ---------------------------------------------------------------------------
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# math_fidelity 4 -- CHOSEN, and it is the same choice for the same reason
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# ---------------------------------------------------------------------------
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# HiFi4 is the only level with an a-priori accuracy guarantee, and on this hardware it
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# costs nothing because the op is data-movement bound: swept across the whole matmul suite,
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# wall time moved 0.6% (docs/tt_bringup_log.md 16.3). MEASURED there, INFERRED here -- an
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# elementwise op does even less math per byte moved than a matmul does, so if fidelity is
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# free for the matmul it is free for this. Re-check if a reader ever gets under ~20 ns a
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# tile.
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#
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# Format: tools/emit_tensix_cb_formats.py
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# cb <index> <format> <tile_r> <tile_c> <face_r> <num_faces>
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math_fidelity 4
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approx 0
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dst_accum_mode 1
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cb 0 Float16_b 32 32 16 4
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cb 1 Float16_b 32 32 16 4
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cb 2 Float16_b 32 32 16 4
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cb 16 Float16_b 32 32 16 4
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