43 lines
1.2 KiB
Plaintext
43 lines
1.2 KiB
Plaintext
/* SPDX-License-Identifier: AGPL-3.0-or-later */
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/* Copyright (C) 2026 David (Corey) Herrera */
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/*
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* elementwise.cu — CUDA elementwise kernels for Foundry
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*
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* Target: sm_37 (K80, Kepler)
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* Compile: nvcc -ptx -arch=sm_37 elementwise.cu -o elementwise.ptx
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*
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* Constraints:
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* - No FP16 math (sm_37 has no native half support)
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* - Use __shfl_down() not __shfl_down_sync() (sync is sm_70+)
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* - Max 1024 threads per block, 48 KB shared memory per SM
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*/
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extern "C" {
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/* out[i] = a[i] + b[i] */
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__global__ void fc_add(const float *a, const float *b, float *out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) {
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out[idx] = a[idx] + b[idx];
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}
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}
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/* out[i] = a[i] * b[i] */
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__global__ void fc_mul(const float *a, const float *b, float *out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) {
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out[idx] = a[idx] * b[idx];
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}
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}
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/* out[i] = x[i] * sigmoid(x[i]) = x[i] / (1 + exp(-x[i])) */
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__global__ void fc_silu(const float *x, float *out, int n) {
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int idx = blockIdx.x * blockDim.x + threadIdx.x;
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if (idx < n) {
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float v = x[idx];
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out[idx] = v / (1.0f + expf(-v));
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}
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}
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} /* extern "C" */
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