36 lines
1.3 KiB
ArmAsm
36 lines
1.3 KiB
ArmAsm
/* SPDX-License-Identifier: AGPL-3.0-or-later */
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/*
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* ft_crt0.S — reset entry for the five Tensix firmware images.
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*
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* Every Baby RISC-V core leaves soft reset at a fixed or overridden pc
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* (tt-isa-documentation, BlackholeA0/TensixTile/SoftReset.md, "Upon leaving soft reset"):
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* GPRs are zero, so nothing above the ISA exists yet. This sets the two registers the RISC-V
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* psABI needs before any C runs — gp (so the linker's gp-relative relaxation is valid) and sp
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* (the top of this core's local data memory, a linker-script symbol) — then calls `main`.
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* Firmware `main` never returns; if it ever did, `exit` parks the core.
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*
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* Placed in `.start`, the section the linker script puts at the image's entry address.
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*
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* Status: clean-room replacement of the staged tree's start file, plan Phase 2.
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* Issues: None
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* Todo: None
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*/
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.section .start, "ax", @progbits
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.global _start
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.type _start, @function
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_start:
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/* gp must be materialised without relaxation: a relaxed form would read gp itself. */
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.option push
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.option norelax
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lui gp, %hi(__global_pointer$)
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addi gp, gp, %lo(__global_pointer$)
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.option pop
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lui sp, %hi(__stack_top)
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addi sp, sp, %lo(__stack_top)
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call main
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tail exit
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.size _start, . - _start
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